Two developments in the first week of September 2026 put 3D DRAM back at the center of the memory industry. AMD disclosed internal test results for a Hybrid Bonding-based 3D DRAM architecture, saying energy efficiency could improve by as much as 17x versus conventional HBM stacks. Around the same time, Chinese semiconductor equipment maker NAURA published an IEEE paper describing a manufacturing advance for next-generation 3D DRAM, including a two-step cyclic etch process for 64-layer alternating silicon and silicon-germanium structures, structural uniformity above 95%, an etch selectivity above 500:1, and silicon loss below 10 angstroms in a 200 nm interlayer structure. The report argues that these announcements matter because conventional DRAM scaling is nearing physical and economic limits. It also reviews the two main technical paths now being pursued, 4F2 VCT and VS-CAT, and outlines how Samsung Electronics, SK hynix, and Micron are positioning themselves. Beyond chipmakers, the shift is also reshaping the equipment chain, from high-aspect-ratio etch to atomic layer deposition, wafer bonding, CMP, cleaning, inspection, coating and developing, testing, and high-purity process systems.

SK Hynix said on Sept. 9 that foundry processes can be used in the development of next-generation 3D DRAM semiconductors, outlining a technical path that brings logic manufacturing and memory design closer together. The statement followed the company’s 2026 SK Hynix Future Forum at its Supex Center in Icheon a day earlier, where Vice Presidents Kim Kyung-hoon and Son Ho-young presented key directions for 3D DRAM, including the use of logic foundry processes for DRAM peripheral circuits, maximizing data bus bandwidth, and enabling ultra-short-distance transmission. The executives said the technology will require solutions not only for design and heat issues, but also for packaging-related challenges such as fine interconnects, bonding, and process integration. Speakers at the forum also pointed to a broader industry shift, arguing that the boundaries between front-end and back-end packaging, and between foundry and memory technologies, are narrowing. Korea University professor Shin Chang-hwan said 3D DRAM is more than vertical chip stacking and proposed an AI-linked 3D integration design framework spanning materials, devices, packaging, and architecture.

Ingenic rang the opening bell in Hong Kong on Aug. 25, debuting at HK$100 per H share and reaching an opening market capitalization of about HK$51.5 billion. The company had already been listed on Shenzhen’s ChiNext board since May 31, 2011, and the new listing places it among semiconductor companies with both A-share and H-share listings. The prospectus outlines a chip platform strategy built across three product lines: memory, compute and analog. That structure took shape after Ingenic completed its acquisition of Beijing Silicon and indirectly took control of Integrated Silicon Solution Inc. (ISSI) in 2020. Since then, the company has operated around three brands: ISSI for memory, Ingenic for compute and Lumissil for analog. Its recent numbers show a rebound. Revenue moved from RMB 45.31 billion in 2023 to RMB 42.13 billion in 2024, then back up to RMB 47.41 billion in 2025. First-quarter 2026 revenue reached RMB 15.60 billion, up 47.1% from a year earlier, while net profit rose to RMB 3.20 billion and gross margin climbed to 42.6%. Ingenic said it expects to raise HK$3.13 billion from the Hong Kong offering. Half of the proceeds are earmarked for R&D, while 25% is set aside for strategic investments and acquisitions.

IOSG argues that the current storage rally is being driven by artificial intelligence, but not in the way traditional IT buyers used to think about storage. In its view, the market is no longer rewarding raw capacity first. It is rewarding the ability to keep GPUs fed, move checkpoints quickly, support retrieval-augmented generation with very low latency, and raise overall compute utilization across tightly coupled infrastructure stacks. That shift, the article says, is why components such as HBM, DRAM, CXL, enterprise SSDs, SSD controllers, NVMe pathways, and performance storage software have become central to the AI investment narrative. The piece draws a sharp distinction between AI storage and decentralized storage. AI storage is framed as an efficiency system built for hot data and commercial output. Decentralized storage, by contrast, is described as a trust system for cold data, focused on permanence, censorship resistance, auditability, and public memory. IOSG uses Filecoin and Arweave as the main examples, outlining how the two networks diverge in architecture and product direction, while also listing persistent problems across the sector, including weak enterprise service layers, retrieval limits, supply-demand incentive mismatches, privacy and compliance tensions, and token economics that can amplify market cycles rather than solve product-market fit.

Chinese memory chipmaker ChangXin Memory Technologies, or CXMT, drew intense market attention after its first trading day on Shanghai’s STAR Market, where its stock surged 472% from the IPO price and its implied market value briefly topped $500 billion, exceeding Intel at one point. Against that backdrop, Goldman Sachs warned that the global memory business is facing what was described as a “new problem,” tied to China’s fast-moving DRAM expansion. According to a July 24 closed-door expert meeting cited in the report, Goldman expects China’s leading DRAM producers to double annual capacity by 2030. A central shift in that buildout is the rising use of domestic semiconductor equipment, with imported lithography tools still required in some fabs while other process steps are increasingly shifting to Chinese-made systems. The report also said CXMT is targeting mass production of HBM3 and HBM3E in 2026, a move aimed at the high-end memory segment used in AI servers. In parallel, Chinese firms are said to be pushing DUV-based process routes under EUV export restrictions, while 3D DRAM is expected to see a new round of R&D breakthroughs in 2027. Goldman added that DRAM price gains may narrow in the second half as smartphone brands resist price increases, though AI infrastructure spending is still expected to support demand through 2027.

ChangXin Memory Technologies, or CXMT, surged 472% on its first trading day after listing on the Shanghai Stock Exchange on July 27, according to the source article. The Chinese memory chipmaker raised 66.6 billion yuan, about $9.8 billion, in what was described as the second-largest initial public offering in China’s history, behind only Agricultural Bank of China in 2010. The deal involved 6.688 billion shares priced at 8.66 yuan each, with the stock opening at 49.50 yuan and the company’s market capitalization reaching roughly 3.3 trillion yuan. Retail demand was heavy: the public tranche was oversubscribed by 212 times, with individual investors submitting 9.4 million orders worth a combined 7.07 trillion yuan. The report said CXMT is the world’s fourth-largest DRAM maker and has been investing in high-bandwidth memory research since 2023. Because U.S. export controls have cut off access to key tools used in standard HBM manufacturing, the company is shifting part of its strategy toward customized 3D DRAM and 3D integrated circuit technologies. Bloomberg data cited in the article showed the IPO was priced at 2.4 times book value, a 56% discount to global peers and a 77% discount to Chinese chipmakers.

Odaily reported that Citrini analyst jukan said in a post on X that Goldman Sachs had spoken with a Chinese DRAM industry expert, who shared a view on pricing, product development, and capacity expansion among Chinese suppliers. According to that expert, Chinese DRAM vendors may be able to price their products at levels comparable to global leaders, even though yields could be lower. The same expert said Chinese DRAM manufacturers may make further progress in 3D DRAM product development in 2027. On production, capacity expansion projects underway in Hefei, Shanghai, and Beijing are expected to come fully online in 2028. The expert also said some wafer fabs are said to rely mainly on domestically produced Chinese equipment, with the exception of high-end tools such as lithography systems.

Citrini analyst Jukan, citing a recent industry analysis from ZDNet Korea, said the AI semiconductor race is shifting away from process-node scaling and toward advanced stacking technologies, with 3D IC emerging as a key next-generation approach for vertically integrating logic and memory. He said Samsung Foundry has recently seen a surge in inquiries about 3D IC, with nearly every potential customer asking about the technology. Even so, Jukan argued that 3D IC is fundamentally customized DRAM made to order, which clashes with the core business model of Samsung and SK hynix, both of which are built around standardized products and large-scale volume production. In his view, the two Korean memory makers are likely to keep their work limited to early-stage research and stay cautious about broad commercialization. That hesitation, he said, is creating an opening for niche players. With U.S. semiconductor restrictions making it difficult for China’s CXMT to enter the HBM market, the company is pursuing 3D IC as a differentiated path, focusing on custom memory instead of taking on Korean suppliers directly in commodity DRAM. A Korean semiconductor industry official said China is already ahead in producing multiple 3D DRAM sample chips, and that companies such as CXMT and Winbond may be the ones to establish this market first.